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32-bit Windows Server address > 4GB RAM - How?

I know that for 32-bit OS, the addressable memory space for each process is "4G" (maybe just 3G in user space...). If I have a 8G RAM, is it correct that all of the processes can still utilize (shared) these 8G memory but each of them are limited to a maximum 4G? Or the whole system only can see and utilize 4G out of 8G and thus having 8G RAM on a 32-bit OS is the same as having 4G RAM on it?

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migrated from stackoverflow.com Dec 15 '11 at 14:32

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marked as duplicate by Chris S, Scott Pack, jscott, MikeyB, pauska Dec 15 '11 at 15:12

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has already been asked here: superuser.com/questions/367490/… –  noah1989 Dec 15 '11 at 14:07
    
Not a question for StackOverflow I think... But yes, each 32bit process may use 2/3/4 G RAM (depending on the OS). A 32bit OS may use more then 4G of RAM if PAE (Physical Address Extension) is supported (which for example isn't the case for WinXP) see: en.wikipedia.org/wiki/Physical_Address_Extension –  Hikaru-Shindo Dec 15 '11 at 14:09
    
@Hikaru-Shindo: That is incorrect. Each 32-bit process may use 2/3/4 GB of virtual memory. They can use more than 4GB of RAM if the OS supports it (either because it's a 64-bit OS or it's a 32-bit OS that supports PAE). There is no limit on how much physical RAM a 32-bit process can use (other than the OS limit) because the OS always controls physical RAM. –  David Schwartz Jul 6 '12 at 9:13

3 Answers 3

On 32bit systems applications can map over 3GB (on Linux up to 64GB) of RAM using so called PAE (Physical Address Extension) support.

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In most linux distributions you need a patched kernel that can address the extra ram. It is usually a "bigmem" kernel.

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You are correct that a process under Linux is limited to 3G in userspace.

Being a 32bit OS, this means that at any one time there are only 2^32 addresses available (therefore 4G). Using technologies such as PAE, you can have up to 2^36 bytes physical RAM.

The task of mapping "only" 2^32 addresses at any one time is handled by the MMU (Memory Management Unit) using TLB entries (Translation Lookaside Buffer). It is, however, the role of the OS to tell the MMU to load/evict TLB entries.

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